LPDDR4, the latest double data rate synchronous DRAM for mobile applications, includes a number of features that enable SoC design teams to reduce power consumption of discrete DRAM in mobile devices.

“We originally patented IMT in 2008 and it has been routinely implemented by many of our SonicsSX ® customers. At that time, SoC designers were early in the move to multi-channel memory architectures, ...

How the use of the OCP TLM SystemC library enhanced the design process of an OCP-based SDRAM controller IP, and dramatically improved the customer evaluation process. Introduction As a leading ...

A technical paper titled “Darwin: A DRAM-based Multi-level Processing-in-Memory Architecture for Data Analytics” was published by researchers at Korea Advanced Institute of Science & Technology (KAIST ...

I have read on various forums that mixing memory modules of different brands can lead to stability issues even though the timings and voltages are the same. If I understand it correctly, each CPU ...

Achieving the total external-memory-bandwidth requirements of consumer SOCs (systems on chips) at acceptable costs gets more difficult with each generation of electronic systems and the DRAM ...

To support the ever-growing demand for greater memory capacity, the density of DRAM chips expands from time to time. This has historically meant that each chip density doubles, from 4Gbit to 8Gbit, ...